ASIC Implementation of Low Power FP-AU using Reversible Logic di Vijeyakumar Krishnasamy Natarajan, Kalaiselvi Sundaram, Vinoth Kumar Bojan edito da LAP Lambert Academic Publishing

ASIC Implementation of Low Power FP-AU using Reversible Logic

Floating Point (FP)-Arithmetic Units (AU)

EAN:

9786139587056

ISBN:

6139587050

Pagine:
52
Formato:
Paperback
Lingua:
Inglese
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Descrizione ASIC Implementation of Low Power FP-AU using Reversible Logic

This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.

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€ 30.87

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